Silicon carbide (SiC) is a semiconductor with a higher hardness and a wider band gap than silicon (Si) and applied to power devices, environmentally resistant devices, high-temperature operating devices, high-frequency devices, and other devices.
For example, MOSFETs as disclosed in Patent Document 1 that will be described below are known as representative switching devices using SiC. FIGS. 14(a) and 14(b) are diagrams showing typical vertical accumulation-mode MOSFETs using SiC. In a unit cell of a typical vertical MOSFET, a source electrode is arranged in the middle of the unit cell. On the other hand, FIGS. 14(a) and 14(b) show the arrangement of electrodes with a gate electrode arranged in the middle. That is, FIGS. 14(a) and 14(b) show a joint between two unit cells. FIG. 14(a) is a plan view showing some of electrodes of MOSFETs when seen from above, and FIG. 14(b) is a cross-sectional view showing the MOSFETs taken along the line XI—XI shown in FIG. 14(a).
As shown in FIGS. 14(a) and 14(b), the known vertical accumulation-mode MOSFET comprises a semiconductor substrate 101 made of n+-type 4H—SiC, an n-type silicon carbide layer 102 formed on the semiconductor substrate 101 and made of n-type 4H—SiC, p-type well regions 103 formed in regions of the upper part of the n-type silicon carbide layer 102 located at both sides of the joint between the two unit cells and doped with, for example, aluminum, a channel layer 104 formed on a region of the n-type silicon carbide layer 102 interposed between the two p-type well regions 103 and the top surfaces of the two p-type well regions and made of, for example, n-type 4H—SiC, source regions 105 formed in the upper parts of the p-type well regions 103 to come into contact with the lateral sides of the channel layer 104, respectively, and doped with, for example, nitrogen, a gate insulating film 106 formed on the channel layer 104 and respective parts of the source regions 105, a gate electrode 107 formed on a part of the gate insulating film 106, source electrodes 108 formed from on the top surface of the source regions 105 to on respective parts of the n-type silicon carbide layer 102 located to the outermost lateral sides of the source regions 105, and a drain electrode 109 formed on the back surface of the semiconductor substrate 101.
The source electrodes 108 each have a structure in which it also functions as base electrodes to which the p-type well regions 103 are electrically connected.
In order to turn the MOSFET ON, a positive voltage is applied to the drain electrode 109, the source electrodes 108 are grounded, and a positive voltage is applied to the gate electrode 107. In this way, switching operations of the MOSFET can be achieved.
When the MOSFET is thus turned ON, electrons serving as carriers initially flow in the direction parallel to a substrate surface as shown in FIGS. 14(a) and 14(b). Thereafter, the electrons flow in the direction perpendicular to the substrate surface as shown in FIG. 14(b). The arrows shown in FIGS. 14(a) and 14(b) show directions in which electrons serving as carriers travel. Current flows in the opposite directions to these arrows. In this relation, the directions in which electrons travel in FIG. 14(a) should be noted. The source electrodes 108 and the gate electrode 107 are arranged such that carriers travel in the direction perpendicular to a substrate miscut direction A. The “miscut direction” indicates the direction within a miscut surface inclined at an angle of several degrees from the crystal plane and extending from a normal vector to the crystal plane toward a normal vector to the miscut surface. The reason why the electrodes are arranged as described above will be described hereinafter with reference to FIG. 15. FIG. 15 is a perspective view schematically showing the top surface and cross sections of a silicon carbide substrate.
The silicon carbide substrate shown in FIG. 15 has a substrate surface miscut by a predetermined angle to the (0001) plane. In FIG. 15, the substrate surface, i.e., the miscut surface is horizontally oriented. Typically, when an element is formed using a silicon carbide substrate, a miscut substrate to the (0001) plane is used. The reason for this is that if a layer is formed by epitaxial growth on a substrate surface miscut by a predetermined angle to the (0001) plane, the polytype can be easily controlled. For example, the surface miscut by approximately 8 degrees from the 4H—SiC(0001) plane in the <11-20> direction (which herein means 1120) is formed as the miscut surface.
However, when a high-temperature process, such as epitaxial growth and heat treatment for dopant activation, is applied to a substrate having the miscut surface as the substrate surface, the step-bunching is developed at the substrate surface along the direction perpendicular to the miscut direction. For example, when the miscut direction is the <11-20> direction, step bunches are formed to protrude along the <1-100> direction perpendicular to the <11-20> direction. The step bunches have a height of approximately 50 through 100 nm, leading to anisotropy in electrical characteristics. The electron mobility in the miscut direction (in the direction transverse to the step bunches) has conventionally differed, for example, by one or more orders of magnitude, from that in the direction perpendicular to the miscut direction (i.e., in the direction parallel to the step bunches).
In view of the above reason, in order to fabricate a semiconductor device capable of passing a large amount of current, electrodes has been required to be arranged such that current flows in the direction perpendicular to the miscut direction. When currents flow through the channel layer 104 in a plurality of directions, electrodes need have been designed such that one of the plurality of directions in which the largest amount of current flows is matched with the direction perpendicular to the miscut direction (for example, Patent Document 1).    Patent Document 1: Japanese Unexamined Patent Publication No. 2001-144288    Patent Document 2: PCT/JP98/01185